A semiconductor chip is generally connected to an external circuit element through contacts on the front face of the chip. For example in the tape automated bonding process (hereinafter referred to as the "TAB" process), a dielectric sheet, such as a thin foil of polyimide, is provided with one or more bond windows and an array of metallic leads on one surface thereof. Each lead has one end integrally connected to terminals on the dielectric sheet and an opposite end extending outwardly from a central portion of the dielectric sheet so that the outermost ends of the leads project beyond the bond windows. The dielectric sheet is juxtaposed with the semiconductor chip so that the bond windows are aligned with the contacts on the chip and so that the outermost ends of the leads overlie the front face of the chip. The leads are then bonded to the contacts of the chip using bonding techniques such as ultrasonic or thermocompression bonding. After the bonding step, the terminals are connected to an external circuit element, such as a printed circuit board, which electrically interconnects the chip and the printed circuit board.
Commonly assigned U.S. Pat. No. 5,148,266, the disclosure of which is incorporated by reference herein, discloses a method of manufacturing semiconductor chip assemblies which are fabricated in a substantially continuous sheet or strip. A plurality of connection components are spaced lengthwise along a continuous tape, each connection component having terminals and flexible leads thereon. In one assembly method, semiconductor chips are connected to respective connection components on the tape and the assembled semiconductor chips are then carried downstream with the tape for further processing steps.
Commonly assigned U.S. Pat. No. 5,659,952, the disclosure of which is incorporated by reference herein, provides methods of fabricating a semiconductor chip assembly having a compliant interface. In preferred methods according to U.S. Pat. No. 5,659,952, a flexible, substantially inextensible dielectric film having a surface is provided and a plurality of compliant pads are attached to the first surface of the dielectric film, whereby any two adjacent compliant pads define a channel therebetween. Attaching the compliant pads to the dielectric film may be accomplished in a number of different ways. In one embodiment, a stencil mask having a plurality of holes extending therethrough is placed on top of the first surface of the dielectric film. The holes in the stencil mask are then filled with a curable liquid elastomer. Desirably, liquid elastomer has a thick enough consistency so that the mask may be removed before curing the elastomer. After the mask has been removed, the elastomer is at least partially cured using energy, such as heat or ultraviolet light. The holes in the mask are preferably filled with the liquid elastomer by screening the liquid elastomer across an exposed surface of the mask such that the elastomer is deposited into the holes of the mask. Thus, there is provided an assembly which includes an array or plurality of compliant pads defining channels therebetween, i.e. the channels run between adjacent compliant pads.
In further stages of the process disclosed in U.S. Pat. No. 5,659,952, the assembly including the array of compliant pads is assembled to a second support structure, such as a semiconductor chip having a front face with contacts. During the assembly step, the front contact bearing face of the chip is abutted against the array of compliant pads and the contacts are electrically connected to terminals on a second surface of the dielectric film remote from the chip. A compliant filler, such as a curable liquid elastomer, may then be injected into the channels between the semiconductor chip and the dielectric film and around the compliant pads while the chip and the dielectric film are held in place. The curable liquid elastomer may then be cured to form a substantially uniform, planar, compliant layer between the chip and the dielectric film.
However, further improvements in handling of the components during assembly processes, such as those described in U.S. Pat. No. 5,659,952, would be desirable.